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matrixMul
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SberBigyin13
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matrixMul
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master
src/array_cell.sv
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Bigyin1
weights setup
19 мар 2025, 15:00
19 мар 2025, 15:00
59f0647
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module array_cell #() ( input clk, input nrst_in, input logic [7:0] weight_in, input logic weight_en_in, output logic [7:0] weight_out, output logic weight_en_out, input logic [7:0] elem_in, input logic [7:0] res_in, output logic [7:0] elem_out, output logic [7:0] res_out ); logic [7:0] weight; always_ff @(posedge clk) begin elem_out <= elem_in; res_out <= res_in + elem_in * weight; end enum logic { W_PASS = 1'b0, W_HOLD = 1'b1 } state, next_state; always_ff @( posedge clk, negedge nrst_in) begin if (!nrst_in) state <= W_HOLD; state <= next_state; end always_comb begin next_state = state; case (state) W_HOLD: if (weight_en_in) next_state = W_PASS; W_PASS: if (!weight_en_in) next_state = W_HOLD; endcase end always_ff @( posedge clk ) begin if (state == W_HOLD && next_state == W_PASS) weight <= weight_in; end // assign weight_out = weight_in; always_comb begin if (state == W_PASS) begin weight_en_out = 1; weight_out = weight_in; end else begin weight_en_out = 0; weight_out = 'X; end end endmodule