loom

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/*
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MIT License
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Copyright (c) 2022 МГТУ им. Н.Э. Баумана, кафедра ИУ-6, Михаил Фетисов,
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https://bmstu.codes/lsx/simodo/loom
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*/
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#include "SystemVerilogSemantics_abstract.h"
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#include "simodo/interpret/AnalyzeException.h"
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#include "simodo/bormental/DrBormental.h"
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#include "simodo/inout/convert/functions.h"
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#include "simodo/inout/format/fmt.h"
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#include "simodo/interpret/StackOfNames.h"
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#include <limits>
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#include <cassert>
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#include <cmath>
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#include <float.h>
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using namespace simodo;
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namespace sv
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{
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    SystemVerilogSemantics_abstract::SystemVerilogSemantics_abstract(interpret::ModuleManagement_interface & module_management)
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        : _module_management(module_management)
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    {
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    }
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    SystemVerilogSemantics_abstract::~SystemVerilogSemantics_abstract()
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    {
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    }
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    void SystemVerilogSemantics_abstract::reset()
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    {
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::before_start() 
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    { 
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        return interpret::InterpretState::Flow; 
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::before_finish(interpret::InterpretState state) 
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    { 
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        return state; 
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    }
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    bool SystemVerilogSemantics_abstract::isOperationExists(ast::OperationCode operation_code) const
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    {
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        SystemVerilogOperationCode operation = static_cast<SystemVerilogOperationCode>(operation_code);
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        switch(operation)
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        {
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        case SystemVerilogOperationCode::None:
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        case SystemVerilogOperationCode::PushConst:
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        case SystemVerilogOperationCode::Assign:
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        case SystemVerilogOperationCode::Equal:
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        case SystemVerilogOperationCode::NotEqual:
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        case SystemVerilogOperationCode::Less:
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        case SystemVerilogOperationCode::LessOrEqual:
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        case SystemVerilogOperationCode::More:
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        case SystemVerilogOperationCode::MoreOrEqual:
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            return true;
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        default:
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            return false;
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        }
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::performOperation(const ast::Node & op) 
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    {
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        SystemVerilogOperationCode operation = static_cast<SystemVerilogOperationCode>(op.operation());
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        switch(operation)
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        {
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        case SystemVerilogOperationCode::None:
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            return executeNone();
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        case SystemVerilogOperationCode::PushConst:
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            return executePushConst(op);
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        case SystemVerilogOperationCode::Assign:
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            return executeAssign(op);
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        case SystemVerilogOperationCode::Equal:
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        case SystemVerilogOperationCode::NotEqual:
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        case SystemVerilogOperationCode::Less:
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        case SystemVerilogOperationCode::LessOrEqual:
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        case SystemVerilogOperationCode::More:
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        case SystemVerilogOperationCode::MoreOrEqual:
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            return executeCompare(op);
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        default:
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            break;
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        }
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        throw bormental::DrBormental("SystemVerilogSemantics_abstract::performOperation", 
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                            inout::fmt("Invalid operation index %1")
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                                .arg(op.operation()));
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::executeNone()
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    {
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        return interpret::InterpretState::Flow;
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::executePushConst(const simodo::ast::Node & op)
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    {
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        assert(_interpret);
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        variable::Variable   constant_variable;
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        [[maybe_unused]] size_t index = 0;
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        switch(op.token().type())
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        {
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        case inout::LexemeType::Annotation:
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            constant_variable = { u"", op.token().lexeme(), op.token().location() };
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            break;
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        case inout::LexemeType::Number:
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        {
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            std::string number_string = inout::toU8(op.token().lexeme());
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            if (number_string[0] != '\''){
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                if (op.token().qualification() == inout::TokenQualification::Integer)
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                    constant_variable = { u"", static_cast<int64_t>(std::stoll(number_string)), op.token().location() };
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                else
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                    constant_variable = { u"", std::stod(number_string), op.token().location() };
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                break;
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            }
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            char type_of_number = number_string[1];
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            number_string = number_string.substr(2);
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            switch (type_of_number)
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            {
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            case 'b':
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                constant_variable = { u"", 
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                        static_cast<int64_t>(std::stoll(number_string,nullptr,2)), 
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                        op.token().location() };
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                break;
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            case 'o':
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                constant_variable = { u"", 
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                        static_cast<int64_t>(std::stoll(inout::toU8(op.token().lexeme().substr(2)),nullptr,8)), 
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                        op.token().location() };
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                break;
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            case 'h':
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                constant_variable = { u"", 
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                        static_cast<int64_t>(std::stoll(inout::toU8(op.token().lexeme().substr(2)),nullptr,16)), 
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                        op.token().location() };
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                break;
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            default:
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                throw bormental::DrBormental("SystemVerilogSemantics_abstract::executePushConstant", 
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                                        inout::fmt("Invalid internal type of constant to convert (%1)")
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                                            .arg(getLexemeTypeName(op.token().type())));
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            }
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            break;
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        }
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        case inout::LexemeType::Punctuation:
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            if (op.token().lexeme() == u"true" || op.token().lexeme() == u"false")
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                constant_variable = { u"", op.token().lexeme() == u"true", op.token().location() };
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            else if (op.token().lexeme() == u"null") {
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                constant_variable = variable::null_variable(op.token().location());
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                index = constant_variable.value().variant().index();
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            }
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            break;
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        default:
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            throw bormental::DrBormental("SystemVerilogSemantics_abstract::executePushConstant", 
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                                        inout::fmt("Invalid internal type of constant to convert (%1)")
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                                            .arg(getLexemeTypeName(op.token().type())));
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        }
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        if (!op.branches().empty()) {
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            std::vector<variable::Value> unit_parts;
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            for(const ast::Node & n : op.branches())
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                unit_parts.push_back(n.token().lexeme());
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            constant_variable.spec().set(u"unit", unit_parts);
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        }
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        stack().push(constant_variable);
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        return interpret::InterpretState::Flow;
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::executeAssign(const simodo::ast::Node & )
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    {
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        assert(_interpret);
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        interpret::name_index_t left  = stack().top(1);
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        interpret::name_index_t right = stack().top(0);
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        variable::Variable & left_var        = stack().variable(left).origin();
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        const variable::Variable & right_var = stack().variable(right).origin();
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        if (left_var.value().isArray() && right_var.type() == variable::ValueType::Int) {
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            std::shared_ptr<variable::Array> array_variable = left_var.value().getArray();
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            if (array_variable->dimensions().size() != 1)
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                throw bormental::DrBormental("SystemVerilogSemantics_abstract::executeAssign", 
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                                            inout::fmt("Invalid internal type..."));
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            variable::index_t            size = array_variable->dimensions()[0];
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            std::vector<variable::Value> array;
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            int64_t                      var = right_var.value().getInt();
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            for(variable::index_t i=0; i < size; ++i ) {
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                array.push_back(var & 1);
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                var >>= 1;
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            }
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            left_var.value() = array;
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        }
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        else
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            left_var.value() = right_var.value().copy();
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        stack().pop(2);
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        return interpret::InterpretState::Flow;
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    }
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    interpret::InterpretState SystemVerilogSemantics_abstract::executeCompare(const ast::Node & op)
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    {
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        interpret::name_index_t top_name_index = stack().top();
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        try
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        {
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            compare(static_cast<SystemVerilogOperationCode>(op.operation()), op.bound().location());
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        }
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        catch(...)
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        {
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            stack().pop(stack().top()+1-top_name_index);
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            stack().variable(stack().top()) = variable::error_variable().copyVariable();
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            throw;
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        }
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        return interpret::InterpretState::Flow;
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    }
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    void SystemVerilogSemantics_abstract::compare(SystemVerilogOperationCode opcode, const inout::TokenLocation & location)
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    {
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        variable::Variable & op1_origin = stack().variable(stack().top(1)).origin();
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        variable::Variable & op2_origin = stack().variable(stack().top(0)).origin();
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        if (op1_origin.value().isError() || op2_origin.value().isError()) {
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            stack().pop(2);
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            stack().push(variable::error_variable().copyVariable());
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            return;
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        }
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        variable::ValueType target_type = getType4TypeConversion(opcode, op1_origin.type(), op2_origin.type());
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        if (target_type == variable::ValueType::Null)
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            throw interpret::AnalyzeException("ScriptSemantics_abstract::compare", 
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                                    location.makeLocation(inter().files()), 
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                                    inout::fmt("For operation %1, the use of types %2 and %3 is not provided")
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                                        .arg(getSblOperationCodeName(opcode))
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                                        .arg(getValueTypeName(op1_origin.type()))
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                                        .arg(getValueTypeName(op2_origin.type())));
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        variable::Variable  op1 = inter().expr().convertVariable(op1_origin, target_type);
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        variable::Variable  op2 = inter().expr().convertVariable(op2_origin, target_type);
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        variable::Value     res;
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        switch(opcode)
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        {
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        case SystemVerilogOperationCode::Equal:
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            res = performCompareEqual(op1.value(), op2.value());
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            break;
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        case SystemVerilogOperationCode::NotEqual:
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            res = !performCompareEqual(op1.value(), op2.value()).getBool();
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            break;
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        case SystemVerilogOperationCode::Less:
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            res = performCompareLess(op1.value(), op2.value());
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            break;
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        case SystemVerilogOperationCode::LessOrEqual:
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            res = performCompareLessOrEqual(op1.value(), op2.value());
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            break;
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        case SystemVerilogOperationCode::More:
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            res = !performCompareLessOrEqual(op1.value(), op2.value()).getBool();
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            break;
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        case SystemVerilogOperationCode::MoreOrEqual:
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            res = !performCompareLess(op1.value(), op2.value()).getBool();
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            break;
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        default:
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            break;
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        }
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        if (res.type() == variable::ValueType::Null)
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            throw interpret::AnalyzeException("ScriptSemantics_abstract::compare", 
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                                    location.makeLocation(inter().files()), 
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                                    inout::fmt("For operation %1, the use of types %2 and %3 is not provided")
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                                        .arg(getSblOperationCodeName(opcode))
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                                        .arg(getValueTypeName(op1.type()))
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                                        .arg(getValueTypeName(op2.type())));
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        stack().pop(2);
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        stack().push({{}, res, location, {}});
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    }
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    variable::Value SystemVerilogSemantics_abstract::performCompareEqual(const variable::Value & op1, const variable::Value & op2) const
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    {
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        switch(op1.type())
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        {
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        case variable::ValueType::Bool:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getBool() == op2.getBool();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::Int:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getInt() == op2.getInt();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::Float:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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            {
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                double val1 = op1.getReal();
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                double val2 = op2.getReal();
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                // Учёт погрешности вычислений с плавающей точкой.
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                // Машинный эпсилон (разница между 1.0 и следующим представимым значением для double)
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                // должен быть масштабирован до величины используемых значений и умножен на желаемую
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                // точность в ULP (единицы на последнем месте). ULP нужно подбирать в зависимсоти от
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                // степени накапливаемой погрешности.
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                /// \todo Подобрать оптимальное значение ULP
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                return std::abs(val1 - val2) <= DBL_EPSILON * std::abs(val1+val2) * 2;
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            }
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::String:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getString() == op2.getString();
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            else
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                return variable::ValueType::Bool;
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        default:
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            break;
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        }
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        return {};
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    }
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    variable::Value SystemVerilogSemantics_abstract::performCompareLess(const variable::Value & op1, const variable::Value & op2) const
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    {
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        switch(op1.type())
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        {
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        case variable::ValueType::Int:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getInt() < op2.getInt();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::Float:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getReal() < op2.getReal();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::String:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getString() < op2.getString();
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            else
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                return variable::ValueType::Bool;
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        default:
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            break;
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        }
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        return {};
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    }
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    variable::Value SystemVerilogSemantics_abstract::performCompareLessOrEqual(const variable::Value & op1, const variable::Value & op2) const
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    {
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        switch(op1.type())
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        {
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        case variable::ValueType::Int:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getInt() <= op2.getInt();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::Float:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getReal() <= op2.getReal();
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            else
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                return variable::ValueType::Bool;
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        case variable::ValueType::String:
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            if (op1.variant().index() != std::variant_npos && op2.variant().index() != std::variant_npos)
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                return op1.getString() <= op2.getString();
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            else
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                return variable::ValueType::Bool;
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        default:
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            break;
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        }
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        return {};
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    }
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    variable::ValueType SystemVerilogSemantics_abstract::getType4TypeConversion(SystemVerilogOperationCode /*opcode*/, variable::ValueType type1, variable::ValueType type2) const
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    {
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        if (type1 == type2)
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            return type1;
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        if ((type1 == variable::ValueType::Int && type2 == variable::ValueType::Float) ||
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            (type1 == variable::ValueType::Float && type2 == variable::ValueType::Int))
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            return variable::ValueType::Float;
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        if (type1 == variable::ValueType::String || type2 == variable::ValueType::String)
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            return variable::ValueType::String;
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        return variable::ValueType::Null;
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    }
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}